Dear ,
ICMASK will perform the FinFET Layout Course remotely/online. It will be delivered in 4 days x 4 hour sessions by the most professional layout guru the CTO of ICMSAK Design Mr. Ciaran Whyte on March 28th -31st (4 days) 2022
IC Mask Design’s FinFET course takes an in-depth look at the key challenges involved in the layout of high
precision and high-speed Analog designs on 16nm technology nodes and below.
This course is designed for Layout Engineers and Design Engineers doing layout and/or design on FinFET
technology nodes, or for anyone transitioning to smaller FinFET technology nodes.
DAY 1: FINFET LAYOUT & LOCAL INTERCONNECT
- FinFET – Layout and key considerations (structure, fins, alignment & orientation).
- Local interconnect strategies and challenges (cut layers, IR drop, EM).
DAY 2 METAL COLOURING & METAL GATE IMPLICATIONS AT FINFET
- Electromigration and IR strategies.
- Metal colouring schemes.
- Implementing WSP’s (design grids).
- Lithography – layout methodologies for improving the lithography and etch process.
- Intro and use of tuck poly.
- Poly in traditional diffusion only structures.
- Cut layers - ideal use scenarios and avoidance.
DAY 3 MANAGING LAYOUT DEPENDENT EFFECTS
- LDE at FinFET; what has changed and what is new.
- Designing out density issues layout from both a manufacturing perspective and a design perspective.
- Continuous diffusion strategies – challenges, risks, and solutions.
DAY 4 DEVICE MATCHING, LATCHUP & SUBSTRATE NOISE ISOLATION
- Device matching at FinFET nodes.
- Recognising latch-up risk and improving immunity.
- Transitioning from traditional substrate noise isolation schemes.